LP6283 IC Schematic Circuit Diagram, Datasheet, Pin Function & Substitute

LP LP6283 IC datasheet, pin function, voltage, Substitute, and schematic circuit diagram.

Today's post brings you a schematic circuit diagram of LP6283 IC. This LP6283 IC is used in TFT

display panels of various brands of LCD TVs and LCD monitors for DC-to-DC converters or power management circuits of LCD panels.

LP6283 IC works as a multiple boost converter and buck converter. This IC's operating voltage or input voltage range is DC 8 volts to 14 volts. The LP6283 IC includes three boost converter circuits, including a VGH charge pump regulator circuit, which acts as a voltage boost, and this IC consists of a buck converter or VGL charge pump regulator circuit, which produces a minus voltage (VGL).

LP6283 is a unique IC that provides an entirely safe power supply to millions of thin film transistors to drive millions of liquid crystal cells installed in LCDs perfectly. The reason is that LP6283 IC has excellent over-voltage protection, under-voltage detection, over-current protection, and short-circuit protection.

LP6283 IC Schematic Circuit Diagram

LP6283 IC Schematic Circuit Diagram and Pin Configuration

Functional Pin Description

1. LDO_I Bypass pin of capacitor connection from LDO_I to ground.

2. OPS Power sours for OPS OPA
3. OGND Ground for OPA
4. OPP Non-Inverting Input for OPP OPA

5. OPN Inverting Input terminal for OPP OPA

6. OPO OPA Output terminal.

7. XAO Reset Function Output terminal.

8. GVOFF High-voltage switch control input. When GVOFF is high, the high voltage switch between VGH and VGHM is active. And at that moment, the high-voltage Switch in the DRN is closed. When GVOFF is low, the Switch between VGH and VGHM is closed, and the control between VGHM and DRN is active.

9. EN Enable Terminal

10. FB_2 Feedback terminal of the buck regulator. Feedback is taken from the output section connected to an external resistive voltage divider for smooth output voltage.

11. OUT Output sense of buck regulator

12. NC No connection

13,14. LX2 Buck Regulator Switching Node. LX2 is connected to the source terminal of the internal NMOS (N Channel MOSFET) of LP6283 IC

15. BST Bootstrap terminal of the buck regulator.

16,17. IN2 Buck Regulator Supply Input. Bypass IN2 to PGND a capacitor.

18. GND Ground of Analog section

19. VDET Voltage detection input. It is connected to an external resistive voltage divider (VIN to Analog Ground).

20. INVL Internal voltage regulator and other functions

21. VREG Internal voltage regulator output terminal

22. FSEL Frequency selection terminal. This terminal determines the frequency of 500 kHz or 750 kHz.

23. CLIMP This terminal serves for overcurrent protection (OCP) of the boost regulator.

24. SS Soft start control terminal

25,26. LX1 Switching node terminal of boost regulator.
27,28. PGND Power Ground
29. GD_I Output sense terminal of boost regulator.
30. GD Gate Driver of external p-channel mosfet (PMOS).
31. FB_1 Feedback 1 for boost regulator circuit.
32. COMP Compensation pin of boost regulator error amplifier.
33. THR Adjustment input pin (terminal) of VGHM falling regulation system.
34. SUPP Power supply for VGH charge pump regulator.
35. CPGND Power Ground for charge pump regulator circuit.
36. DRVP Driver output of VGH charge pump regulator.
37. DLY Delay input.
38. FBP Feedback Pulse input from VGH charge pump regulator output connected voltage divider circuit.
39. VGH GPM input
40. VGHM GPM output
41. DRN GPM discharge terminal
42. SUPN Supply Negative bias (Probably)
43. DRVN Driver Negative output of VGL charge pump regulator.
44. GND Ground of Analog circuit.
45. FBN Feedback Negative input of VGL charge pump regulator. Feedback is taken from the voltage divider circuit connected to VGL from REF to control the VGL output.
46. REF Reference Voltage.
47. LDO_FB Feedback input of linear regulator.
48. LDO_O Linear regulator output terminal.
49. EP Exposed Pad connected to ground (Bottom pad of LP6283 IC)